ELECTRONIC DESIGN AUTOMATION SOLUTIONS 電子設計自動化解決方案

最高效率光罩GDS layout平台
L-edit for MEMS/ MOSFET/IGBT/GaN/SiC /Photonics / LED / Mask

TANNER : 完善的類比/整合訊號(AMS)設計與PDK支援

Affordable, integrated analog/mixed-signal design flow that is easy to customize to your environment

由 Mentor Graphics PDK 提供的 Tanner EDA 服務是針對簽訂維護合約的客戶提供,而且通常也提供包含回呼的符號庫;Spice 模擬模型;圖層、GDSII 和轉譯定義;P-單元;驗證設定;以及寄生參數萃取規則文件。搭配 Tanner EDA IC 設計工具套件使用時,PDK 可為客戶提供一個緊密配合目標製程的設計流程:從電路圖繪製開始,然後從電路圖導向佈局到完整的 DRC 和 LVS 驗證。

TANNER MEMS DESIGN FLOW

Affordable, easy-to-use 3D MEMS design environment for faster time to market

Tanner MEMS design flow delivers 3D MEMS design and fabrication support in one unified environment and makes it easy to integrate MEMS devices with analog/mixed-signal processing circuitry on the same IC. Foundry-proven, it enhances the manufacturability of MEMS devices via mechanical, thermal, acoustic, electrical, electrostatic, magnetic and fluid analyses.

TANNER L-EDIT PHOTONICS

Tanner EDA offers a complete solution for the design capture and manual implementation and verification of an integrated photonics design.

L-Edit Photonics extends the full-featured layout editor L-Edit to support manual layout of integrated photonic designs. It enables the creation of a design that contains both photonic waveguides and the associated electrical components. Designers can place optical components from a foundry-provided PDK and then connect them with curved waveguides. Designer can insert crossings where necessary. L-Edit Photonics precision-snaps waveguides to optical pins to ensure a perfect waveguide to device connection.

TANNER L-EDIT IC LAYOUT

A complete analog/mixed-signal IC physical design environment that is flexible and highly configurable

Create layouts that match the schematic the first time, maximizing efficiency and reducing the CAD manager’s support burden. Get up and running easily with platform independence and flexible licensing. Reduce manual routing with:

  • Real-time net flylines

  • Nets & pins tracking

  • Geometry marking/highlighting/by net

  • ECO tracking

  • Available for Windows and Linux

TANNER VERIFY DRC AND LVS

Comprehensive analog/mixed-signal IC design-rule checking (DRC) and netlist extraction that’s fast and easy to use

Tanner Verify DRC and LVS is a comprehensive solution for analog/mixed-signal IC Design Rule Checking (DRC) and netlist extraction.  Its 64-bit engine enables fast, simple debugging through DRC and netlist extraction, and uses advanced hierarchical algorithmic techniques to provide optimal performance for your designs.

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TANNER CALIBRE® ONE DRC/LVS/XRC

Confidently tape out analog/mixed-signal designs with Calibre’s industry leading DRC, LVS, and parasitic extraction tools.

The Tanner-Calibre One IC verification suite is an integral part of the Tanner™ analog/mixed-signal (AMS) physical design environment, creating an easy path to the proven capabilities of Calibre verification tools.

  • Tanner-Calibre One is a key part of Tanner’s complete, full-flow analog/mixed-signal (AMS) IC design suite.

  • The Tanner schematic capture tool S-Edit and the physical layout editor L-Edit is tightly integrated with the Calibre verification suite.

  • The Calibre platform is the industry-leader for physical verification and is qualified for sign-off by every major IC foundry and the Tanner Calibre One verification suite uses the same Calibre design kits.

  • Tanner Calibre One DRC/LVS/xRC license can only be used with Tanner L-Edit.

 

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Hsinchu County, Hsinchu, 30273

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