MEMS Digital Qualification - Predicting Yield During Initial Design

#047DBALearn how Mentor’s Tanner MEMS solutions, SoftMEMS, OnScale, and statistical analysis tools work together to predict actual device performance and yield of a MEMS device manufactured by SilTerra.


Register for the webinar: https://webinars.sw.siemens.com/mems-digital-qualification-2/join


Overview

In MEMS and semiconductor design, 20% of the upstream design decisions affect 80% of the downstream foundry processing, packaging, assembly, and system-level performance and yield. Device designers are seldom able to consider the implications of their design decisions on system-level robustness because the tools and workflows to analyze design impacts on device and system yield did not exist. Until now.


In this webinar, we will demonstrate a new fully integrated workflow that begins at the design capture and parametric layout stage of a new device design, brings in process simulation to emulate MEMS/Semi processes steps and create fab-accurate 3D models of devices, and uses cloud simulation to simulate distributions of die, wafer, package, system, and environmental performance outcomes. We will compare results with measured data supplied by SilTerra, a leader in monolithic CMOS/MEMS foundry services, with test data collected using Polytec test and measurement systems.


At the end of this webinar, engineers will be empowered to reduce risk, cost, and time-to-market for new MEMS and semiconductor R&D by leveraging MEMS parametric layout to 3D model automation, large-scale efficient 3D modelling, massively scalable Cloud simulation, and Digital Prototyping and Qualification.



What You Will Learn

Learn about how Tanner L-Edit MEMS and SoftMEMS to OnScale simulation workflows enable a paradigm shift in “MEMS Digital Qualification”- the ability to determine device and system-level performance and yield during upstream device design stages.


Who Should Attend

  • MEMS designers

  • MEMS process engineers

  • System engineers, mixed-signal IC designers working at integrated MEMS and IC

  • Test and verification engineers

  • Fabrication/foundry engineers

  • CAD/EDA managers

  • Researchers in the field of MEMS

Date and Time

June 9, 2021. 9 AM China / Hong Kong / Singapore. 10 AM Japan / Korea.

June 8, 2021. 6pm US PST


Meet the speakers

Angela Wong

SIEMENS EDA

Technical Marketing Engineer

Angela Wong is a Technical Marketing Engineer at Siemens EDA, and currently manages the MEMS technical solutions. Angela has over 20 years of experience in custom IC design, semiconductor industry, and EDA.



Ian Campbell

ONSCALE


Ian is a Georgia Tech trained engineer and serial entrepreneur, having founded two Silicon Valley high tech companies. The first, NextInput, broke records in getting a new MEMS technology to market in high volume applications like smartphones and wearables. The second, OnScale, is a Cloud Engineering Simulation platform backed by Intel Capital and Google's Gradient Ventures. OnScale Cloud combines advanced proprietary multiphysics solvers with cloud supercomputers and AI/ML and breaks performance and cost constraints for engineers optimizing Digital Prototypes of devices like next-gen MEMS, 5G RF filters, IoT devices, medical devices, and much more. OnScale massively reduces cost, risk, and time-to-market for R&D firms pushing the boundaries of new technology.



恩萊特科技股份有限公司 Enlight Technology Co., Ltd.

更多研習資訊:www.enlight-tec.com

302新竹縣竹北市復興三路二段168號6樓之一

電話:03-602-7403

傳真:03-621-0304

sales@enlight-tec.com

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