By Tina Durgia
The semiconductor industry has come a long way in terms of the technological advancements and growth. Thanks to these recent technological improvements, designers today can pack a lot more devices on much smaller chips, but this has resulted in increased design complexity and timing closure challenges.
At older technology nodes, non-linear delay models (NLDM) were more commonly used for timing signoff, but at more advanced nodes, interconnect wire widths are smaller resulting in much higher wire resistance values compared to the driver resistance. Also, at these nodes, designers must deal with the Miller Effect, which is due to the coupling capacitance between the input and output nodes of a cell. These submicron effects are better handled with Composite Current Source (CCS) models for post-route and sign-off stages.
Logic libraries typically contain both CCS and NLDM models, but during the early phases of the design flow, especially at logic synthesis and pre-route optimization stages, it is very common for designers to use NLDM models to reduce the design iteration time and save overall runtime. However, as designers approach the sign-off stage, they rely on the more accurate CCS models to be able to close timing. This is when things start to get a little complicated – for example, what if the NLDM and CCS models are not consistent? What if the timing at sign-off and implementation stages does not correlate?
To avoid discrepancies between the sign-off and implementation stages, NLDM and CCS timing models must correlate well. Therefore, it is imperative that the libraries (.libs) used are precise and accurate, and any large differences in the timing models are addressed early in the design cycle. Given the size of .libs and the complexity of data, verification and validation of .libs can be a daunting task.
The good news is Solido Analytics (from Siemens EDA) helps addresses these challenges. The tool includes a set of built-in rules that cover common .lib structure validation checks, such as checks for cell mismatches, missing groups, and consistency check between CCS and NLDM data. Solido Analytics also provides a powerful visualization GUI with meaningful charts and clickable text to assist debugging and allows users to visualize differences between NLDM and CCS data across libraries in both textual as well as waveform formats. This feature is one of the many differentiated capabilities of Solido Analytics that shortens .lib validation cycles and reduces the engineering effort needed to thoroughly verify libraries.
Our recent article “Use machine learning and visualization to accelerate Liberty file verification” on Tech Design Forum, talks in detail not only about how these consistency checks can be performed in Solido Analytics, but also explains other useful capabilities, including the interactive dashboard that provides real-time waveform and table results, as well as the library visualizer interface that lets users generate custom plots and compare multiple liberty files in minutes.
I encourage you to read the article to learn more about Solido Analytics and how it helps users resolve NLDM and CCS consistency issues.
Happy consistency checking!
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