Siemens Digital Industries Software announced today at the TSMC 2023 North America Technology Symposium a range of new certifications and collaborations with longtime partner TSMC, resulting in key achievements toward enabling Siemens EDA technologies for the foundry’s latest process technologies. Calibre platform certified for N3E processes Siemens’ industry-leading Calibre® nmPlatform tool for integrated circuit (IC) verification sign-off is now fully certified for TSMC’s a

By John Ferguson In recognition of the growing need for a more holistic approach to three-dimensional integrated circuit (3DIC) design, TSMC introduced their 3DFabric™ technologies in 2020 to incorporate system design, 3D stacking, and their advanced packaging technologies, such as TSMC-SoIC™, InFO, and CoWoS®. That was quickly followed by the formation of the TSMC Open Innovation Platform® (OIP) 3DFabric Alliance to accelerate 3DIC ecosystem innovation and readiness even fur

By Kesmat Shahin How many times, as you traversed across design stages and ran countless iterations, have you wished that you had a superpower to let you accomplish 100 things at the same time? Oh, and maybe a magic wand, so you could find and fix just actionable errors without even debugging? Unfortunately, superpowers and magic wands are pretty hard to come by in integrated circuit (IC) design, but with Calibre nmLVS Recon early design layout vs. schematic (LVS) checking, S

Siemens Digital Industries Software today announced TSMC has certified a broad array of EDA solutions from Siemens Digital Industries Software for the foundry’s newest process technologies. In addition, recent collaboration between Siemens and TSMC has successfully established key milestones of relevance to mutual customers, including 3D IC enablement, further advancement of EDA in the cloud, and a range of other successful initiatives. “Siemens has been a long-standing ecos

西門子數位化工業軟體今日宣布與聯電（UMC）合作，為聯電的晶圓對晶圓堆疊（wafer-on-wafer）及晶片對晶圓堆疊（chip-on-wafer）技術提供新的多晶片 3D IC 規劃、組裝驗證，以及寄生參數萃取（PEX）工作流程。 據悉，聯電開發出其全新混合鍵合（hybrid-bonding）3D 電路布局驗證（LVS）和寄生參數獲取工作流程，使用西門子 XPEDITION Substrate Integrator 軟體進行設計規劃與組裝，西門子 Calibre 3DSTACK 軟體進行晶片間的連接檢查，同時還使用 Calibre nmDRC 軟體、Calibre nmLVS 軟體及 Calibre xACT 軟體進行 IC 及晶片間延展實體及電路驗證任務。 而在雙方合作後，聯電也將向全球客戶提供此項新流程。藉由在單一封裝元件中提供晶片或小晶片（chiplet）彼此堆疊的技術，企業可以在相同或更小的晶片面積上實現多個元件的功能。與在 PCB 板上擺置多個晶片的傳統系統配置相比，這種方法不僅更加節省空間，而且能夠提供更出色的系統效能及功能以及更

What is 5G and what are its benefits? The fifth generation of mobile telecommunications technology, or 5G, is the next generation of wireless network technology, promising faster data speeds and more bandwidth than ever before. What does that mean for the average person? Think about cellphones, for one. People don't just use their phones for calling or texting anymore—they surf the web, check in with social media apps, watch movies, listen to music playlists, write blogs, tak

Siemens Digital Industries Software today announced a range of expanded electronic design automation (EDA) early design verification functionalities for its Calibre® platform for integrated circuit (IC) physical verification. Engineered to help IC design teams and companies get to tapeout faster, these new capabilities can help IC designers "shift left" their physical and circuit verification tasks by moving the identification, analysis, and resolution of complex IC and syste

By Michael White When you’re flying, it’s fun to look out the window and see clouds from “the other side.” When you’re running an IC design company, clouds take on a whole new perspective as well. Just like planes made it possible to cross continents and oceans in hours rather than days, EDA in the cloud can make it possible to get to tapeouts faster. But, just as we trust planes to carry us safely to our destinations, we also have to trust that running EDA software in the cl

Overview Starting L-Edit The L-Edit UI How to customize your environment Design Setup Masks and Layers Drawing Editing Cells and Hierarchy