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Transistor-level EMIR analysis from custom design tools? It’s all about flexibility!
By Roger Kang How do you run transistor-level electromigration and voltage drop (EMIR) analysis—command line or an interactive invocation GUI? Does your layout designer have to wait for circuit designers to provide EMIR results and guidance before fixing any violations, and then iterate over and over until all EMIR violations are fixed? Maybe you’d prefer a new approach? How about one that lets layout designers deliver a high quality layout with no design rule checking (DRC),
Dec 26, 20232 min read


亞洲.矽谷物聯網產業大聯盟年會盛大舉行 龔明鑫:亞洲.矽谷將邁向3.0階段
龔明鑫:亞洲.矽谷方案未來將邁向3.0階段 展現台灣物聯網與5G實力 國發會主委龔明鑫致詞時表示,2016年在施振榮先生的號召之下,亞洲.矽谷物聯網產業⼤聯盟成立,現在看到數位轉型需求非常熱門,也算是超前部屬;而且聯盟會員持續成長,今年已來到435家,並且物聯網發展與應用也...
Dec 19, 20236 min read


Simplifying component research for efficient electronics design
By Matt Walsh Let’s delve into the challenges that electronic systems development organizations face and how an integrated part research solution, such as PartQuest Portal, can help streamline the design process, making it faster and more efficient. Challenges in electronics development Electronic systems development organizations are no strangers to complex challenges. Tight deadlines, resource limitations, the aspiration for first-pass success, and productivity hurdles coll
Dec 19, 20233 min read


Save yourself the time—here’s a way for you to view native block instances from a full-chip context
By Ritu Walia Imagine this: You primarily work on the design of a sub-block of an application-specific layout design, or perhaps an intellectual property (IP) block for a system-on-chip (SoC). You’ve designed your block, and it’s ready for the SoC team. As you work hand-in-hand with the team striving to deliver the SoC within the (forever) limited time-to-market window, you face a multitude of challenges—complex design rule checking (DRC), iterative debugging, combined with t
Dec 12, 20231 min read


國科會公布國家核心關鍵技術加強保護營業秘密
有關國家核心關鍵技術清單,旨在確保國家安全與產業競爭優勢,針對涉及國家核心關鍵技術之營業秘密加強保護,避免非法外流至國外造成國家與產業利益受侵害,並不影響合法商業行為及技術交流。國科會及各相關部會後續將配合技術發展的變動,持續廣納意見,預計將於三個月後滾動檢討。...
Dec 7, 20232 min read


陽明交通大學國際半導體產業學院書報討論-Silicon Photonics: Lighting the Way to Faster, More Efficient Chips
陽明交通大學國際半導體產業學院於近期邀請到恩萊特科技陳昇祐技術總監擔任講師,就當前熱門的矽光子技術及其未來發展趨勢進行深入探討。 在演講中,陳昇祐技術總監深入探討了生成式人工智慧(AI)潮流如何推動了矽光子技術的需求,以及EDA工具在從EIC到PIC轉變中所扮演的關鍵角色,...
Nov 23, 20231 min read


PCB design best practices: electrical/electronic co-design
By Stephen Chavez What is electrical/electronic co-design? Circuit boards don’t work in isolation, they usually interface with other circuit boards via connectors, cables or harnesses. Electrical/electronic co-design is the integrated collaboration between these disciplines. This way, your entire hardware design from multi board electronic system specification to completed PCBs and cables can be handled within one integrated flow. What’s not working? Full systems design is us
Nov 21, 20232 min read


「引領AI浪潮 矽光子晶片關鍵技術與展望研討會」圓滿結束!
感謝各位熱情參與,研討會現場氣氛熱烈,座無虛席! 在場來自TSRI、Siemens EDA和恩萊特科技的專家,不僅分享了矽光子面臨的各種挑戰,更深入探討了矽光子如何在半導體發展中扮演關鍵角色,以及如何透過EDA工具實現矽光子IC設計自動化,降低成本和風險。 如果你有任何矽光子設計工具、製造或設計上的需求,歡迎隨時與我們聯繫,期待更多的交流與合作!
Nov 17, 20231 min read


TSIA 2023年第三季台灣IC產業營運成果出爐
根據WSTS統計,23Q3全球半導體市場銷售值達1,347億美元,較上季(23Q2)成長6.3%,較2022年同期(22Q3)衰退4.5%;銷售量達2,371億顆,較上季(23Q2)成長2.6%,較2022年同期(22Q3)衰退14.4%;ASP為0.568美元,較上季(2...
Nov 14, 20232 min read
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