By Jim Martens We recently held a webinar for small and medium sized PCB design teams on how to create supply chain resilience. We talked...

By Stephen Chavez What is PCB design? PCB design is the entire process of creating a Printed Circuit Board (PCB) through collaboration...

By: Deb Geiger, VP Global Marketing, Aegis Software One of the biggest challenges manufacturers face today is effectively managing and...

Horsham, PA (May 22, 2023) — Aegis Software, a global provider of Manufacturing Operations Management Software (MOM/MES) with more than...

By Maya Shani Introduction: In a response to growing DFM requests from our customers, the latest release of Valor NPI , 2305, our biggest mission was to improve our analysis on positive polarity copper layers. In addition to this, we have also extended our coverage of conveyor related issues with board and rail corners, cleaned up analysis result viewing, provided an ability to graphically view the component VPL side definition and re-organized MRA menus and icons. Take a pee

Horsham, PA (May 9, 2023) — Aegis Software, a global provider of Manufacturing Operations Management Software (MOM/MES), today announced...

San Jose, Calif. — June 21, 2023 — SupportLogic, the world’s first Support Experience (SX™) management platform, today announced the winners of its inaugural Support Experience Awards during the second annual SX Live Virtual Conference. SX Live is the definitive industry conference for Support Experience, and over 2,000 people in the support and customer success function worldwide, from CXOs to frontline professionals, have participated in the event series in the past year. T

By Hossam Sarhan and Alexandre Arriordaz With the increasing complexity of design layouts and shorter tapeout cycles, waiting until signoff verification to find and correct errors is no longer practical for integrated circuit (IC) design teams. To achieve tapeouts on schedule, designers must now apply reliability verification checks throughout the design flow, from intellectual property (IP) level to full-chip level, to ensure they meet design schedules while confirming desig

By James Paris The OASIS* database format is a widely used industry standard in electronic design automation (EDA) software for integrated circuit (IC) design flows. While the OASIS standard provides a set of rules for the format and content of the file, different EDA tools may create different solutions to represent the same layout in OASIS format. These variations in the content and structure of the resulting databases may cause significant issues in the production IC desig