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Accelerating RF PCB design in a 5G world
By David Wiens The demand for high-speed and efficient RF (Radio Frequency) PCB design has never been greater. With billions of IoT devices expected to come online in the coming years, the necessity for RF design capabilities supporting ultra-fast 5G speeds is becoming increasingly apparent. The 5G revolution: why extreme speed support is crucial Several factors are driving the demand for extreme 5G speed support in RF PCB design. These include: IoT: the Internet of Things is
Jul 11, 20243 min read


Automated analysis-based layout enhancements reduce power grid voltage drops during place & route: A case study with Google
By Jeff Wilson Power isn’t just a small factor in the IC design arena—it’s a cornerstone. Design teams work to hit the trifecta of power, performance, and area (PPA) targets that reflect the intended market and functionalities of their products. The journey from concept to physical implementation is one of precision and innovation, as these teams shape layouts that meet these stringent targets. But, as technology pushes into more advanced process nodes, striking a balance bet
Jul 9, 20243 min read


Accelerate IP design cycles and reduce costs with Calibre design stage verification
By Terry Meeks In the fast-paced world of semiconductor design, time is a critical asset. One way IC designers save time is to...
Jun 25, 20244 min read


Meeting RF design challenges with PADS Professional Premium
By Jim Martens The demand for electronics with gigahertz wireless technology, as well as IoT consumer devices have both increased dramatically. This has resulted in the subsequent increase of RF circuitry on designs, which will only continue as we move into the future. The unique design requirements of RF designs An engineer recently told me that their design only had about 10% RF circuitry on it, but that 10% takes up 90% of their design time to complete! This is because RF
Jun 18, 20242 min read


Unraveling the 3DIC shift left strategy: Navigating the world of multi-dimensional ICs
By John Ferguson IC design’s evolution continues to push the boundaries of Moore’s law to new heights. One of the most intriguing...
Jun 11, 20245 min read


PCB design best practices: power integrity analysis
By Todd Westerhoff What is power integrity analysis? PCB power integrity analysis is the study of a PCB’s Power Delivery Network (PDN),...
Jun 4, 20245 min read


Mastering parasitic extraction at the 3 nm process node
By Dilan Heredia and Karen Chow Designing integrated circuits (ICs) for the 3 nm process node poses challenges never seen before. One of...
May 29, 20245 min read


TSIA 2024年第一季台灣IC產業營運成果出爐
根據WSTS統計,24Q1全球半導體市場銷售值達1,377億美元,較上季(23Q4)衰退5.7%,較2023年同期(23Q1)成長15.2%;銷售量達2,184億顆,較上季(23Q4)衰退0.6%,較2023年同期(23Q1)衰退2.2%;ASP為0.631美元,較上季(2...
May 20, 20242 min read


Parasitic extraction technologies: Advanced node and 3D-IC design
By John McMillan Most IC designers adopt advanced process technology nodes to benefit from improved performance, density, and functionality while also reducing delays and power consumption through continuous dimensional scaling. The utilization of new device architectures like fin field-effect transistors (finFET), fully depleted silicon-on-insulator (FDSOI), and gate-all-around GAA transistors extends gate length scaling but also results in increased interactions between nei
May 14, 20243 min read
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