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How Siemens EDA is using the TSMC 3Dblox standard to change 3DIC verification
By John Ferguson In recognition of the growing need for a more holistic approach to three-dimensional integrated circuit (3DIC) design, TSMC introduced their 3DFabric™ technologies in 2020 to incorporate system design, 3D stacking, and their advanced packaging technologies, such as TSMC-SoIC™, InFO, and CoWoS®. That was quickly followed by the formation of the TSMC Open Innovation Platform® (OIP) 3DFabric Alliance to accelerate 3DIC ecosystem innovation and readiness even fur
Apr 25, 20233 min read


The secret superpower of early design verification
By Kesmat Shahin How many times, as you traversed across design stages and ran countless iterations, have you wished that you had a superpower to let you accomplish 100 things at the same time? Oh, and maybe a magic wand, so you could find and fix just actionable errors without even debugging? Unfortunately, superpowers and magic wands are pretty hard to come by in integrated circuit (IC) design, but with Calibre nmLVS Recon early design layout vs. schematic (LVS) checking, S
Apr 18, 20232 min read


晶片驗證速度再進化 西門子EDA Calibre研討會重磅回歸
隨著半導體先進製程的技術不斷向前推移,晶片設計的挑戰性不斷提高,貿易戰對全球產業供應鏈等衝擊,電子設計自動化(EDA)工具領導供應商西門子EDA,為協助使用者獲得最即時、最專業資訊,於11月底在新竹國賓大飯店舉辦睽違近2年的「Siemens EDA Calibre Day...
Dec 9, 20224 min read
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