Introduction The adoption of high-density advanced packaging (HDAP) continues to grow for all kinds of end-user applications. 2.5D integrated circuit (IC) designs using interposers (silicon or organic) generally target high-end applications such as military, aerospace, and high-demand computing, while 3D fan-out packaging approaches like the TSMC integrated fan-out (InFO) package focus more on mass consumption consumer applications like cell phones (figure 1). In addition, al

Siemens has collaborated with United Microelectronics Corporation (UMC) to develop process design kits (PDKs) for the foundry‘s 110-nanometer (nm) and 180-nm BCD technology platforms. Siemens Digital Industries Software today announced it has collaborated with United Microelectronics Corporation (UMC) to develop process design kits (PDKs) for the foundry‘s 110-nanometer (nm) and 180-nm BCD technology platforms. The new PDKs for UMC, which is a leading semiconductor foundry fo

By Shelly Stalnaker Electronic design automation (EDA) grew out of the need to make it easier and faster to design and manufacture integrated circuits. Nothing has changed since then, except…everything has changed. Just a couple of decades ago, we were entering “unknown territory”—the sub-nanometer era. Today, foundries and design companies are exploring 1nm process nodes. In all that time, the EDA industry constantly expanded functionality to address new design and manufactu

By Wei-Lii Tan Recently Felipe Schneider (from the Solido Crosscheck applications engineering team) and I hosted a live webinar on how to improve time-to-market and silicon quality by utilizing a better IP QA flow. The webinar garnered quite a bit of interest, and we got several great questions from people who tuned in, so I thought I would follow-up here with some additional information. It’s no secret that readily-available, high quality design IP has not only shortened ove

By Slava Zhuchenya Graphical user interface (GUI) frustration is real. Deployment of integrated circuit (IC) physical and circuit verification decks to design flows can be tough. First gathering all the correct files, then finding and setting all the correct options and selecting proper checks, can not only be tedious and time-consuming, but also consume valuable resources during the design process. Don’t you think your resources (human AND computing) are better used to ensur

By Dennis Joseph Is the dress black and blue, or white and gold? Is that a rabbit or a duck? People looking at the exact same image often see it differently. While it can be fun to argue with friends about trivial disagreements like this one, it’s a lot less fun when you’re designing a computer chip and you’re arguing with your coworkers about how the layout looks. It’s frustrating, and impedes real work getting done. (Okay, maybe arguing with people on Twitter is also frustr

By John Ferguson Cost, risk, and the limitations of monolithic scaling are driving growth in multi-die (heterogeneous) advanced IC packaging solutions (Whew! That’s a mouthful!). You might also know it by its other name, high-density advanced packaging (HDAP). At Siemens, we’ve spent a fair amount of time researching, working on, and talking about the challenges and opportunities in HDAP design. One thing we’ve learned is that successful HDAP design requires design teams to w

本白皮書將簡單介紹了如何使用Tanner設計IC、整合嵌入式軟體、系統探索與記錄及 PCB 設計的設計流程來建立物聯網邊緣裝置。

本文討論了如何利用多專案晶圓服務以及用於開發混合訊號 ASIC 的低成本設計工具（如 Tanner L-Edit IC）來削減成本與風險。